1. Field of Invention
The present invention relates generally to buffer management in a computer system, and more specifically to ensuring that a buffer in a computer system is available prior to writing data thereto.
2. Background of Invention
The speed and efficiency of an integrated circuit or computer program is affected by the number of read and write operations required to move data from a source to a destination. Such data throughput typically involves writing data to buffers, and then managing the outbound processing of that data to a destination. Because a single process typically writes to many buffers in any order, including in parallel, it is important to ensure that a buffer is available prior to writing data thereto.
Fast throughput can be especially important in hardware implementations, for example an integrated circuit for performing communication operations. Typically, before writing to a buffer on such an integrated circuit, an external process writes to a register on that circuit to indicate that the buffer is busy. After processing the buffered data, logic on the integrated circuit clears the register, indicating that the buffer is available. Thus, prior to writing to a buffer, a process can check an associated register on the circuit, to determine whether the buffer is busy or not. However, in order to allow the process to read the register and check the buffer status, the integrated circuit must be readable. This introduces latency, because read operations are more computationally expensive than write operations. For this reason, it is desirable to be able to use a write only integrated circuit, with which the above-described method cannot be used.
However, by moving the status registers to memory located off of the integrated circuit (for example, in the memory of the computing device on which the process is running), other complications are introduced. More specifically, because the buffers are typically small, they are filled with data and processed more quickly than inter-circuit communication can practicably occur. Thus, the external process writing data has no assurance that a buffer that is marked as available actually received and processed the last data written thereto. This is so because the earlier written data could still be in route from the process to the buffer, in which case it would soon arrive at the buffer and render it unavailable, despite its indicated status to the contrary.
Furthermore, even where a status register is located on the same integrated circuit as the associated buffer, the input-output bus does not necessarily guarantee that a write operation is processed before a subsequent read operation. Thus, it is possible that a process writing to a buffer marked as available lacks assurance that earlier written data is not still in route to that buffer, even where the status registers and buffers are part of the same integrated circuit.
What is needed are methods, systems and integrated circuits to ensure the availability of a buffer to a process writing thereto, whether the status register corresponding to the buffer is or is not located on the same integrated circuit (or other computing device) as the buffer, and even where that integrated circuit (or other computing device) is write only.